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Parallel Processing Computer
This project introduces a computer that uses multiple microcontrollers (MCUs) that cooperate to solve one problem. This “parallel computer” can be used as an educational system that will help the development, understanding and fine-tuning of many parallel algorithms. It can also be used to achieve high performance in many cases such as in Digital Signal Processing.
The computer is easily constructed using many microcontrollers of type PIC24FJ16GA002-I/SP. However the efficient use of it requires more effort as the development and implementation of parallel algorithms is a rather difficult task.
This parallel computer is of type “Single Instruction Multiple Data” (SIMD) which means that all MCUs execute the same program, but each MCU works with different data. All MCUs execute code from their internal flash memory. A key feature for the implementation of the parallel machine is that all MCUs have to execute the program in absolute synchronization with each other. This is achieved by using a common external clock for all the MCUs, and by forcing all MCUs to begin execution at the same time. This is feasible with the PIC24FJxx family and is achieved through controlling the CLK and RESET inputs of the MCUs. A clock enable/disable switch is also implemented to allow the user to “freeze” the code execution at any time as the parallel computer may be used for educational reasons.
The MCUs communicate with other MCUs to exchange data. Thus a “network” is
developed between the MCUs. The topology of this network affects the design of the algorithms that are executed in the parallel machine and also plays an important role in the efficiency of the algorithm. Each microcontroller of this parallel computer can communicate with at most 12 other microcontrollers. In this way it is possible to construct complex networks with many processing elements (for example 212 =4096 MCUs can be connected in a hypercube topology). The communication between MCUs is performed through serial connection using the internal UARTs. The Peripheral Pin Select mechanism is used to dynamically map the UARTs Transmitter and Receiver to the desired pins.